Design of Low Power SRAM Cell Using Adiabatic Logic
نویسندگان
چکیده
منابع مشابه
Design of Low Power Sram Memory Using 8t Sram Cell
Low power design has become the major challenge of present chip designs as leakage power has been rising with scaling of technologies. As modern technology is spreading fast, it is very important to design low power, high performance, and fast responding SRAM (Static Random Access Memory) since they are critical component in high performance processors. The Conventional 6T SRAM cell is very muc...
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ژورنال
عنوان ژورنال: Journal of Physics: Conference Series
سال: 2020
ISSN: 1742-6588,1742-6596
DOI: 10.1088/1742-6596/1716/1/012039